![]() Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Application filed by International Business Machines Corp filed Critical International Business Machines Corp Priority to US09/782,579 priority Critical patent/US6574714B2/en Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION reassignment INTERNATIONAL BUSINESS MACHINES CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). ![]() Original Assignee International Business Machines Corp Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) ( en Inventor Ravi Kumar Arimilli John Steven Dodson Guy Lynn Guthrie Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Expired - Lifetime, expires Application number US09/782,579 Other versions US20020112124A1 Google Patents Efficient instruction cache coherency maintenance mechanism for scalable multiprocessor computer system with write-back data cacheÄownload PDF Info Publication number US6574714B2 US6574714B2 US09/782,579 US78257901A US6574714B2 US 6574714 B2 US6574714 B2 US 6574714B2 US 78257901 A US78257901 A US 78257901A US 6574714 B2 US6574714 B2 US 6574714B2 Authority US United States Prior art keywords cache instruction processing unit data computer system Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US6574714B2 - Efficient instruction cache coherency maintenance mechanism for scalable multiprocessor computer system with write-back data cache ![]() US6574714B2 - Efficient instruction cache coherency maintenance mechanism for scalable multiprocessor computer system with write-back data cache
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